The Sun is the major source of energy on Earth and has been producing energy for billions of years. Although the Sun is about 90 million miles away from us, it takes only about 8.5 minutes for light to travel from the Sun to Earth. Heat and light from the Sun, solar energy, is one of the cleanest and most abundant sources of renewable energy.

During most of the Sun's life, energy comes from the fusion of hydrogen nuclei. Four hydrogen nuclei are fused to form a helium nucleus and a neutron is released. From the law of conservation of energy, energy is released because the helium nucleus has a slightly lower mass than the sum of the original hydrogen nuclei. This energy eventually makes its way from the centre of the Sun to the outer regions and is emitted in the form of electromagnetic radiation. This radiation is spread in the form of electromagnetic waves and a particle of the electromagnetic radiation is known as a photon. The Sun emits photons across a broad range of wavelengths, getting smaller (higher in energy) from radio waves to gamma rays, as shown in Figure 1.1.¹  Wavelengths below 200 nm (X-rays, γ-rays and UV radiation) are absorbed by nitrogen and oxygen in the atmosphere, the region between 200 and 300 nm (UV radiation) is absorbed by O₃ in the stratosphere, wavelengths above 700 nm (IR radiation) are partially absorbed by CO₂, O₃ and water. Visible light, the region of the spectrum our eyes can detect, is composed of relatively short wavelengths in the range 400 to 700 nm. Approximately, 46% of solar radiation falls within visible light wavelengths, as shown in Figure 1.2.²  Of this, 30% is reflected back by the atmosphere or the Earth's surface. The temperature of the Sun (5800 K at the surface) means the solar spectrum peaks at around 550 nm, in the green portion of the visible region. This is equivalent to about 2.3 eV, which can be calculated using eqn (1.1).

where, h is Planck's constant in eV, c is the speed of light in m s⁻¹ and λ is the wavelength of the light in nm.

Single-junction silicon solar cells convert light from about 300 nm to 1100 nm. A broader spectrum for harvesting the light can be achieved by stacking a number of solar cells with different operational spectra in a multi-junction configuration. For this reason, multi-junction solar cells can reach higher conversion efficiencies than traditional single-junction silicon solar cells.

The amount of solar energy incident on a given location depends on various factors, such as the time of the day, the weather and the latitude. Air mass 1.5 (AM1.5) is the most widely used solar spectrum (radiation reaching the Earth's surface) to study and compare the performances of different solar cells under standardised conditions. AM1.5 or “1 sun” is defined as equal to 1000 W m⁻². The number “1.5” represents that the distance the sunlight travels through the atmosphere to the Earth's surface is 1.5 times the shortest distance (when the Sun is overhead). The standard spectrum outside the Earth's atmosphere is called AM0 and is used for non-terrestrial applications.

On average, about 340 W m⁻² of solar energy is incident on the Earth's atmosphere, of which approximately 240 W m⁻² is absorbed by the Earth system, which includes oceans, land surfaces and the atmosphere itself.^3,4  The amount of energy the Earth receives from the Sun in a day is sufficient to cover our needs for a whole year. For example, the UK receives, on average, about 3 kWh m⁻² of solar energy per day, or 1095 kWh m⁻² per year. If a typical UK family uses about 30 kWh m⁻² of electricity per year, then we get 37 times more energy per square metre from the Sun than we consume annually. In fact, enough energy arrives on a relatively small area to meet our demands for a year, if only we could harness it properly. Hence, the challenge is how to harness all of this energy efficiently and to convert it into usable energy, efficiently. This clearly implies that we do not have an energy problem on our planet, we have a conversion problem. The key to efficient conversion of sunlight into electricity is to develop technologies to collect and absorb solar energy efficiently and to convert it into electricity, efficiently. In general, the generation of electricity from sunlight by a solar cell takes place in steps as shown in Figure 1.3, wherein each step contributes to the total conversion efficiency of the cell.

Solar cells are made of semiconductor materials. In a semiconductor all valence electrons reside in the valence band and the lowest lying unoccupied band is called the conduction band. The region in between, where there are no energy states, is called the band gap. Most of the solar cells on the market today are based on silicon crystals.^5–7  Silicon has 14 electrons (electronic configuration: 1s² 2s² 2p⁶ 3s² 3p²) with 4 electrons in the outermost shell, as shown in Figure 1.4(a). If silicon is doped with pentavalent arsenic atoms (5 electrons in the valence shell) from group 15, the 1 extra electron from each arsenic atom does not chemically bond with the silicon atom and becomes a free electron. These free electrons that cannot chemically bond to the neighbouring atoms, move around freely in the conduction band, as shown in Figure 1.4(b). This type of semiconductor is called an n-type semiconductor, or in other words, a semiconductor rich in electrons. Likewise, if silicon is doped with trivalent boron atoms (3 electrons in the valence shell) from group 13, each dopant atom shares only 3 electrons with the neighbouring silicon atom as they have 1 less electron in the valence shell when compared to silicon. This will result in a vacancy (or “hole”) in the valence band, as shown in Figure 1.4(c). This type of semiconductor is called p-type semiconductor, or in other words a semiconductor rich in holes.

To form a solar cell, these two types of semiconductors are placed in contact with each other. At the region of contact, the extra electrons in the n-type semiconductor combine with the extra holes in the p-type semiconductor. When this combination of electrons and holes happens, the loss of negatively charged electrons leaves positive ions in the n-type material, and the depletion of holes leaves negative ions in the p-type material. This build-up of charges near the interface (the “depletion zone”) creates an electric field between the two n-type and p-type materials that stops any more combination of electrons and holes. If an electron from the n-type material tried to penetrate through this barrier, it would be repelled by the negative charges of the p-type material and the holes would be repelled by the positive charges of the n-type material. This barrier acts as a wall that keeps the electrons to the n-side and the holes to the p-side. This barrier is called a p–n junction. When sunlight strikes the p–n junction with energy greater than the band gap energy of silicon, electrons are promoted from the valence band to the conduction band, generating an electron–hole pair with different potential energy. Since an electric field has been created at the junction, the electron will move towards the n-side and the hole towards the p-side. If the solar cell is connected through wires to an external circuit, the electrons travel to the contact with the n-type material and pass through the external circuit to reach the p-side, where they recombine with the holes. This flow of electrons is the current and, by placing metal contacts on the top and bottom of the solar cell, current can be drawn off for external uses such as powering an electrical device. Each similar cell generates only a few volts of electricity, or about 1.5 W of power. A solar panel is used to combine the energy produced by many such cells to make a useful amount of electrical current and voltage. Several solar panels are combined to create a solar array, for residential and commercial use. As the current produced by a solar cell or a solar panel is a direct current (DC), solar arrays are connected to an inverter to convert the DC into alternating current. These panels are used to supply power to a wide variety of systems, from calculators, streetlights, parking meters and household appliances to space stations. They are also used in conjunction with other sources of energy, such as wind, natural gas and nuclear energies.

Silicon has evolved as a dominant technology for the production of electricity from sunlight and, currently, accounts for more than 80% of the PV market.⁶  In its pure form, silicon is a silvery grey lustrous solid. As shown in Figure 1.5, it is the second most abundant element in the Earth's crust (about 27.5% by mass) after oxygen (about 50.5% by mass), and is available in sufficient quantity to match global energy demand on the order of terawatts.⁸ 

In nature, silicon is not found in its elemental form and, instead, it occurs in the form of silica or silicon dioxide. Quartz, which is found abundantly in sand, is the most common form of silica. Silica is used to produce metallurgical grade silicon, which then undergoes several stages of purification and refining steps to produce silicon of high purity for applications in the photovoltaic (PV) industry. Apart from its abundance, there are other reasons why silicon remains the material of choice for PV applications. Silicon is non-toxic in all its natural forms. Silicon is also non-corrosive and forms a very thin, chemically stable, strongly adhering protective layer of silicon oxide at the interface between silicon and the atmosphere. This naturally formed, electrically insulating oxide acts as a passivating layer and reduces the number of recombination centres at the surface, thereby improving the performance of the silicon solar cells.⁹  The oxide layer also lowers the risk of degradation of a silicon wafer inside a solar module and, consequently, the long-term stability of the technology has contributed to its establishment in the PV market.

Solar cells have non-linear current–voltage (I–V) characteristics, which are very sensitive to factors like the temperature and intensity of the light incident on the device. The I–V relationship for a typical solar cell is shown in Figure 1.6. Ideally, the current–voltage behaviour follows the single exponential relationship known as the diode equation:

where I₀ is a constant, q is electronic charge, k is the Boltzmann constant, and T is temperature (K).

The net current (I) of the solar cell device is the difference between the dark current that flows as a result of the applied potential difference (V), and the photocurrent in the opposite (positive) direction.

A non-ideality factor, β, is introduced to account for resistance in the device.

The solar parameters: the short circuit current (I_SC), the open circuit voltage (V_OC), the fill factor (FF) and the efficiency (η) of the solar cell are all determined from this characteristic. The efficiency, η, is the most commonly used parameter to compare the performance of different solar cells.

The maximum power point of the cell is the values of I and V (I_max and V_max) at which the maximum rectangle in Figure 1.6 meets the I–V curve. I₀ and γ in the diode equation limit the maximum obtainable power to approximately 75–80% of the maximum theoretical power. To account for this, a term called the “fill factor” (FF) is introduced.

Much optimisation goes into fabricating a solar cell to achieve a high device performance or energy conversion efficiency.^10,11  This is discussed in detail in Section 1.2. Efficient energy conversion efficiency is an important issue because the efficiency influences the entire value‐chain cost of the PV system, from material production to system installation.¹²  The more efficient a solar cell is, the more cost effective it is to meet the current growing energy demands. Some of the earliest PV modules used circular wafers with no material between them, resulting in a low packing density and, so losing power from those areas brought down the efficiency of the modules. These circular wafers have been replaced with pseudo-square wafers, which have increased the packing density and, hence, increased the efficiency of the modules.

The chart in Figure 1.7 shows the National Renewable Energy Laboratory's (NREL) best research-cell efficiencies, as of 2018.¹³  The chart tracks the growth of research and development in the PV industry and the progress in device performance across the globe, from 1976 to the present, for a range of photovoltaic technologies. William Shockley and Hans Queisser first calculated the maximum theoretical efficiency, also known as the Shockley–Queisser (SQ) limit, of an ideal solar cell in 1961. The maximum theoretical solar cell efficiency is determined by the band gap of the semiconductor materials used for the p–n junction. Semiconductor materials with lower band gaps absorb more photons, resulting in higher I_SC and lower V_OC, while the materials with higher band gap have lower I_SC and higher V_OC. For maximum output power and efficiency, a compromise between the material with low band gap and high band gap is necessary. The trade-off between higher V_OC with increasing band gap and decrease in I_SC results in an optimum band gap energy for a single p–n junction solar cell, which falls close to 1.1 eV. For silicon solar cells with a band gap of 1.1 eV, the SQ limit is calculated to be about 30%.¹⁴  In the laboratory, the record solar cell efficiency for mono-crystalline silicon solar cells is as high as 25%, and about 20% for multi-crystalline Si solar cells.^15,16  The best commercial silicon cell efficiency is about 23% at the cell level and about 18–24% at the module level.^15,16  The existing challenge in current PV technology is to bring this gap between the research record efficiency and the efficiencies achieved in commercial production, as close as possible.

Silicon is obtained by thermal reduction of silica or silicon dioxide in the presence of carbon. An essential prerequisite for the growth of crystalline silicon from the raw materials is the availability of silicon of the highest purity attainable.¹⁷  Impurities or defects in the single crystals can lower the performance of the solar cell device due to recombination of charge carriers. Depending on the impurity content, there are three grades of silicon: metallurgical grade silicon (MG-Si), solar grade silicon (lesser level of impurity than MG-Si) and semiconductor grade silicon.

MG-Si is extracted from a quartzite reduction reaction with carbon in an electrode arc, furnace heated to about 1800 °C, as shown in eqn (1.2).

The purity of MG-Si is only 98%, with carbon, alkali earth metals, transition metals and a high concentration of boron and phosphorus (>50–100 ppmw) as impurities. The presence of impurities increases the recombination of the charge carriers, as they produce defect states within the band gap. This affects the electronic properties of the silicon and makes it unsuitable for electronic applications. More than 2 million tons of MG-Si is produced annually and it is largely used in metallurgical industries. The semiconductor and PV industries account for only a small percentage of silicon demand. Excluding the United States, ferrosilicon accounts for about 65% of world silicon production on a silicon-content basis.¹⁸ 

MG-Si is also used as a raw material for solar grade and semiconductor grade silicon. Pulverised MG-Si is reacted with anhydrous hydrochloric acid in a fluidised bed reactor to form trichlorosilane, SiHCl₃ as shown in eqn (1.3).

SiHCl₃ is purified from impurity chlorides, such as FeCl₃, AlCl₃ and BCl_3, by multiple distillations. Finally, pure SiHCl₃ is reacted with hydrogen to produce a very pure form of silicon, as shown in eqn (1.4).

The process was developed by Siemens in the 1950s and is currently the standard process for production of electronics grade silicon. The reaction takes place inside a large vacuum chamber, a Siemens deposition reactor, with two thin polysilicon rods (∼5 mm diameter), and silicon is deposited on these rods to produce high purity polysilicon rods (diameters up to 300 mm) of columnar grains of silicon. The Siemens process is a very energy intensive method of polysilicon production and hence it is the most expensive when compared with other methods such as the fluidised bed reactor and upgraded metallurgical grade (UMG method). However, it produces the purest silicon of all techniques.¹⁹  The UMG method cannot be used in the semiconductor industry, but it is becoming more popular for solar cell applications, due to the reduced production cost and time. However, to make silicon cells of reasonable performance, large-grained, multi-crystalline (grain size between 1 and 100 mm) or single crystal (grain size > 100 mm) substrates of high purity are required.¹⁹  Two other types of crystalline silicon used in solar cell fabrication are polycrystalline (grain size between 1 µm and 1 mm) and amorphous silicon (grain size < 1 µm).^20,21 

Single crystals of silicon (c-Si) for the PV industry are grown by the Czochralski and float zone methods, which account for 35% of worldwide photovoltaic production.¹²  Czochralski silicon (Cz-Si) is grown by gradually pulling an oriented seed crystal out of the molten silicon contained in a quartz crucible with a graphite susceptor, while simultaneously rotating it so that the inhomogeneities in the melt are not replicated in the growing crystal. By controlling the speed of rotation, pulling rate and the growth temperature, defect-free single crystals are grown. Boron, phosphorus, arsenic or antimony are added to grow p-type or n-type single crystals of silicon. Traditional silicon-based solar cells are usually p-doped with boron. This method is extensively used to obtain silicon ingots in semiconductor industries for the production of silicon wafers. The only drawback is that during the growth process a large quantity of oxygen is released from the quartz crucible into the melt. A small percentage of oxygen from the melt is incorporated into the crystal, while most of it is lost as silicon monoxide from the molten surface. This gas can interact with the hot graphite susceptor and form carbon monoxide that re-enters into the melt, introducing a tiny amount of carbon into the single crystal as an impurity. The presence of carbon and oxygen as impurities can affect the performance of the solar cell adversely by lowering the cell efficiencies.²²  Oxygen can form precipitates and act as recombination centres to reduce the lifetime of charge carriers. Crucible contamination can be avoided by using magnetic fields (magnetic field applied Czochralski, MCz) to control the convection fluid flow and create oxygen traps to slow its migration into the crystal. This technology continues to provide control of oxygen content with good radial uniformity and, hence, high quality single crystals.

Float zone silicon (FZ-Si) substrates are an alternative to Cz-Si substrates, with an extremely low concentration of impurities.²³  In this method, a polycrystalline silicon rod is passed vertically downwards through a heating zone, which starts melting the part of the rod coming under the influence of the heating field. A seed crystal is brought in contact with the melt, which initiates nucleation and growth of a single crystal. At the interface between the solid and liquid phases, impurities (low segregation coefficient ∼10⁻⁴) diffuse more into the liquid phase than the solid phase, resulting in the growth of a highly pure single crystal of silicon. FZ-Si crystals are doped by adding doping gases, PH₃, AsH₃ or B₂H₆, into the inert gas. Owing to the difficulty in growing crystals with large diameters compared with the Czochralski technique and a higher production cost, FZ wafers are typically only used for laboratory applications.

The process used to make multi-crystalline silicon (Mc-Si) is simpler and costs less, accounting for approximately 50% of worldwide photovoltaic production.¹²  Mc-Si is grown by slow solidification of molten silicon in a fused quartz silica crucible coated with silicon nitride (to avoid sticking of silicon to the walls), and nucleation is initiated either from the bottom or walls of the ingot. Compared with single crystalline silicon, the material quality of Mc-Si is poorer due to the presence of grain boundaries. During the growth process, impurities from the walls of the crucible accumulate at the grain boundaries, locally increasing the recombination activity. This reduces the charge carrier lifetime and the performance of the solar cell.²⁴  High-performance Mc-Si silicon, achieved by nucleation on special seed layers at the crucible bottom, is now increasingly replacing conventional Mc-Si as it has a much-reduced dislocation density.²⁵ 

To avoid the cutting process (Section 1.1.3), techniques have been developed to grow sheets of silicon with a defined thickness. Due to the introduction of a high level of impurities and a large number of defects during crystal growth at high temperature with higher cooling rate, these techniques are less frequently used and continue to be dominated by traditional single crystal growth from ingots.^26,27 

Depending on factors such as the required size, quality and its application, the growth of crystalline silicon can take from one week to several months. Once an ingot has been grown, it is then sliced up into smaller ingot blocks. The smaller blocks are then cut into wafers using a wire saw or diamond-edge saw to reduce the kerf loss and increase the productivity. Wire sawing may induce small cracks penetrating around 10 µm deep into the wafers, decreasing the mechanical strength of the wafers and increasing the surface recombination.^28,29  The cut wafers are then cleaned in a series of chemical baths to remove any residual slurry and refined to make them stronger and flatter. The edges are then rounded or profiled using an edge-grinding procedure, to provide strength and stability to the wafer. This reduces the probability of breakage or chipping while handling the wafer during device fabrication.

These wafers are loaded into a lapping machine that uses pressure from rotating plates with an abrasive between them to achieve a predetermined uniform thickness. Lapping the wafer allows uniform removal of saw damages, surface defects and stress accumulated in the wafer during the cutting process. Once the silicon wafers are lapped, they go through an etching and cleaning process, using another series of chemical baths to remove any residual surface damage caused by lapping.

The final crucial step is polishing and cleaning the wafer, which takes place in a clean room (Class 1 to Class 10 000). Wafers are physically and chemically cleaned using ultra-pure water and chemicals, producing a mirrored surface. This process eventually removes the surface topography, scratches, micro cracks and any other damage caused during the manufacturing process.

The industrial goal for PV power is to reduce the cost of electricity generation compared to the equivalent for commercial grid electricity.¹²  This includes reducing the cost at all the stages of device fabrication starting from material production, wafer development, processing techniques to system installation, while continuing to maintain the maximum conversion efficiency of the cells. Almost half of the total cost of the PV module is from the material production, crystal growth and wafer development, while the other half is from cell processing and module assembly. Improving the utilisation of silicon during the fabrication process and decreasing the kerf loss, can reduce the cost per watt of the wafers. For instance, in the case of ribbon growth, where there is no kerf loss, as there is no cutting or wire sawing involved, most of the silicon is used up. But the disadvantage of such technologies is a lower efficiency due to both the lower material quality and a larger number of defects arising from thermal stresses during the growth process, which reduces the minority carrier lifetime of the cell. The solar cell efficiency of crystalline silicon is limited by three loss mechanisms: optical losses, carrier losses and electrical losses. The back contact silicon solar cell is another high efficiency device, where all the metallisation on the front surface is removed. This reduces the optical losses such as losses due to shadowing and reflection.

Following the etching process, the surface of the silicon wafer is shiny and reflects more than 35% of incident light.¹⁴  Interaction of visible light within a material can be described in terms of its index of refraction by the equation:

where, n is the real component of the refractive index which represents the phase velocity of the light inside the material and k, the imaginary component of the refractive index, is the extinction coefficient which contributes to the gradual loss of the light intensity as it travels through the material.

The amount of light reflected from the surface of the wafer, R is given by:

where, 1 is the refractive index of air.

At visible wavelengths, R mainly depends on the real component of the index of refraction and the above equation becomes:

Optical losses, such as reflection of light from the front surfaces, rear surfaces and from the front contacts, limit the amount of light that is incident on the solar cell and lower its efficiency. These limitations can be addressed by texturing the top surface, applying an antireflection coating, texturing the busbar (the top contacts that connect directly to external leads) and introducing a textured back surface reflector (which follows Lambertian law and allows trapping of light back into the cell by total internal reflection) followed by encapsulation. According to Yablonovitch et al., for bulk silicon solar cells, there is an upper limit to the increase in optical path length for effective absorption of light, by a factor of 4n², also known as the Yablonovitch limit.³⁰  This enhancement factor is used as the figure of merit to estimate the capability of a solar cell to absorb light. By engineering the optical properties of the front and back surface of the solar cell, we can minimise the amount of light reflected or increase the amount of light absorbed and achieve physically thin but optically thick solar cells.

The losses due to carrier recombination in any of the three regions, i.e., emitter, base or space charge region, also greatly affect the short circuit current and open circuit voltage of a cell, lowering its efficiency. The average length a minority carrier moves, from the time of its generation before it recombines, is called its diffusion length (L_d)and is given by eqn (1.8)

where, τ_bulk is the carrier lifetime in the bulk and D, the diffusivity, is given by:

where, k is the Boltzmann constant, T is the temperature, q is the charge of the minority carrier and µ is the mobility of the charge carrier.

Ideally, for highly efficient solar cells, the photoexcited carriers generated must be able to move from the point of generation to the point of collection. Hence, the longer the diffusion length, the lower the recombination rate and the larger the current collection, or the larger the short circuit current density. This can be represented by eqn (1.10), where the short circuit current density, J_SC is directly proportional to the diffusion length, L_d

where, G is the charge carrier generation rate.³¹ 

If the diffusion length of the charge carrier is smaller than the thickness of the cell, then the short circuit current will be reduced. In such cases, reducing the thickness of the absorber layer or increasing the diffusion length of the minority carriers can increase the short circuit current of the cell. However, if the diffusion length is more than the thickness of the cell, or is twice the thickness of the cell, the short circuit current tends to reach saturation.

The saturation current density, J_o, is dependent on the diffusion length and is given by eqn (1.11):

where, n_i is the intrinsic carrier concentration and N is the dopant concentration.

The open circuit voltage, V_OC is dependent on the short circuit current density, J_SC, and saturation current, as shown in the eqn (1.12):

From eqn (1.11) and (1.12),

From eqn (1.10) and (1.13),

Hence, the efficiency of the cell increases with the diffusion length. However, when the diffusion length is greater than the thickness of the cell, it no longer obeys the linear relationship. Defects in the bulk of a solar cell greatly influence the minority carrier lifetime. In such a case, electrons generated closer to the surface are more likely to contribute to the total current collected at the front contact than that generated in the bulk, due to recombination at the defect centres in the bulk.

External quantum efficiency (EQE) is a measure of the number of charge carriers generated for a number of photons incident on the solar cell. Figure 1.8 shows an EQE curve as a function of wavelength, for a silicon solar cell.³² 

where J_λ = short circuit current density at wavelength λ, P_λ = incident optical power density at wavelength λ.

The absorption depth is inversely proportional to the absorption coefficient, and the absorption coefficient depends on the wavelength of the light incident on the cell, as shown in Figure 1.9.³²  Consequently, light of different wavelengths penetrates different distances before being absorbed. Hence, longer wavelength light has a greater absorption depth, and shorter wavelength light has a shorter absorption depth. The blue spectrum of the incident light, which has a larger absorption coefficient, is absorbed near the front surface of the cell. Accordingly, recombination at the front surface would adversely affect the collection probability, reducing the quantum efficiency in the blue portion of the spectrum. For example, surface passivation by depositing a layer of silicon dioxide reduces the surface recombination at the front of the cell. Formation of a shallow emitter under the front contact also improves the blue response. The green portion of the spectrum is absorbed in the bulk.

The reduction in the quantum efficiency in this region is due to a low diffusion length and optical losses caused by reflection. The red response is reduced due to surface recombination at the rear surface, reduced absorption at the rear surface and low diffusion lengths. Doping the rear surface heavily keeps the minority charge carriers away from high recombination at the rear contact.³²  Photons with energy below the band gap energy of the cell are not powerful enough to excite an electron from the valence band to the conduction band and, hence, no light is absorbed below the band gap energy of the cell. As a result, the quantum efficiency is zero at the corresponding wavelengths of light.³² 

The minority carrier diffusion length greatly depends on its lifetime (τ) and mobility (µ). The minority charge carriers are metastable and will only exist for a length of time equal to the minority carrier lifetime, before they recombine. The carrier lifetime of the minority charge carriers is determined by its recombination rate, which, in turn, is dependent on its concentration. When the carrier concentration is low, the carrier lifetime is inversely related to the recombination rate, R, and is given by,

where, Δn is the excess minority carrier concentration.

The effective carrier lifetime, τ_eff is given by

The dangling bonds at the surface of the silicon introduce trap states, providing additional pathways for trap-assisted recombination at the surface.^33,34  The surface recombination rate is limited by the rate at which minority charge carriers move towards the surface; in other words, the carrier lifetime at the surface is limited by the surface recombination velocity, S, as given by eqn (1.17)

where, W is the width of the cell.

In a surface with no recombination, the net movement of carriers towards the surface is zero and hence the surface recombination velocity is zero. In a surface with high recombination, the movement of carriers towards the surface is limited by the maximum velocity they can attain.³²  Surface passivation reduces the number of dangling bonds on the surface and hence reduces the recombination at the surface of the cell. Limiting the surface recombination can lessen the rate at which minority carriers are depleted. Hence, if the rate of minority carrier depletion can be limited, the lifetime of the cell can be extended.³² 

In the bulk of a solar cell, there are three types of recombination mechanism which affect the minority carrier lifetime. They are radiative, Shockley–Read–Hall (SRH) and Auger recombination, as shown in Figure 1.10 and they are expressed as:

Radiative recombination, or band-to-band recombination, occurs when an electron drops from the conduction band into the valence band, combines with a hole and releases a photon. Radiative recombination is very slow and is rarely a dominating mechanism in silicon-based solar cells.

The presence of defects or impurity atoms in the bulk of a solar cell creates sub-band gap energy states within the energy band gap of silicon. Shockley–Read–Hall (SRH) or trap-assisted recombination occurs when an electron drops into these sub-band gap energy levels and combine with a hole. As the number of defects increases the SRH recombination rate also increases. Single crystals of silicon with lower concentration of impurities or defects, used for fabrication of solar cells, have a longer minority carrier diffusion length and hence lower recombination losses in the bulk.^35–37 

Auger recombination occurs when carrier concentration is high due to heavy doping or high-level injection. Since, Auger lifetime is a function of the carrier concentration, it is given by:

(1.19)where, the Auger coefficient, C, for silicon is typically: 1.66 × 10⁻³⁰ cm⁶ s⁻¹.^32,38,39 

Here, an electron and a hole recombine in a band-to-band transition, but now the resulting energy is given off to another electron in the conduction band. The involvement of another electron increases the recombination rate and decreases the carrier lifetime. Hence, the heavier the carrier concentration, the shorter is the Auger recombination lifetime and the shorter the diffusion length. Both trap-assisted (SRH) and Auger recombination limit the carrier lifetime in silicon-based solar cells.^40–42 

The final type of loss is the resistive losses, which arises due to the semiconductor bulk resistance, emitter resistance, metallisation on the top surface and metal–semiconductor contact resistance. Resistive losses due to series resistance are controlled by the design and architecture of a solar cell, while a low shunt resistance is a processing defect. Minimising these losses, increases the fill factor and, hence, the efficiency of a solar cell.^43–46  Shunt resistance between the metal–semiconductor interfaces can also affect the fill factor of the device and drop the performance of the device significantly.

Contact resistance losses occur at the interface between the metal contact and bulk silicon and depend on the doping concentration. Heavy doping under the contacts reduces this loss, while the doping is controlled by a compromise between achieving a low saturation current in the emitter and maintaining a high emitter diffusion length.³²  Increasing the number of busbars on the wafer devices minimises the series resistance, although it may cause problems with shadowing. Once again, the key design trade-off in top contact design is the balance between the increased resistive losses associated with a widely spaced grid and the increased reflection caused by a high fraction of metal coverage of the top surface.³² 

The design and optimisation of solar cells is therefore a complicated process, and small changes in one variable can have a substantial impact on the overall power produced by the system. The overall efficiency of the device is dependent on the efficiency of each individual step in the mechanism (see eqn (1.20)). Losses in efficiency (e.g., charge recombination competing with charge separation, transfer or transport) at any point will limit the total efficiency of the device. In solar cell development, as one factor is made more efficient, by controlling a particular pathway for recombination or reducing the energy required for a particular step, another variable becomes limiting.

Gluntz describes this as analogous to limiting factors in ecology and has adapted Leibig's law of the minimum (“The yield potential of a crop is like a barrel with staves of unequal length and is limited by the shortest stave”) for solar cells (see Figure 1.11).^10,11  In his work, Gluntz addresses the limitations in the design of a high efficiency cell structure in the PV industries for reducing the cost of solar cells. The capacity of the barrel (with water) represents the efficiency potential of the cell and each stave represents a kind of limitation which may affect the total conversion efficiency of a cell. As the capacity of water in the barrel is limited by the length of the shortest stave, the efficiency of the cell is limited by the above-mentioned losses. In this case, as shown in Figure 1.11, the shortest stave is the surface recombination velocity at the rear surface.^10,11  Current commercially produced solar cells with high efficiency have most of the features described in Box 1.1 included in their cell structures.¹² 

Texturing the wafer surface removes the damage induced during the sawing process and is an effective light-management technique. Texturisation causes multiple reflections on the surface and enhances the absorption of light into the cell by increasing the probability of light entering the surface and by increasing the optical path length of the light. Ideally, a solar cell absorbs most of the light from the visible and ultraviolet region (the photon energy is well above the band gap energy of silicon) before reaching the rear side of the cell. Optical losses, due to high reflection in short wavelength and low absorption in long wavelength regions, limit the conversion efficiency of a solar cell. Light trapping in the cell, especially of longer wavelength photons in the infrared region, can be achieved through surface texturisation. The well-defined features selectively direct light into the cell at angles outside the escape cone of silicon increasing the absorption of light and increasing the cell efficiency.^47–50  The requirements for successful reduction in surface reflectance by surface texturisation are optimum feature size, high surface roughness and high uniform surface coverage.⁵⁰ 

The texturisation in laboratory and commercial silicon solar cells can be either by physical or chemical methods.⁵⁰  Chemical methods include isotropic wet etching using either acid or alkaline solutions. Mono-crystalline silicon wafers are typically textured in a weak solution of NaOH or KOH, resulting in randomly distributed pyramids, as the oriented planes〈100〉 and〈100〉have different etch rates.^28,50–52  Texturing is followed by a cleaning process in acidic solution, such as HCl and HF, followed by rinsing with deionised water to remove metal impurities from the surface. The lateral uniformity and anisotropy can be improved by adding isopropyl alcohol or a surfactant to the etchant, and this can result in a reduction in the total reflection from 35% to 12%.^28,53  In Mc-Si wafers the random texturisation process is not effective as the wafers are made up of smaller silicon grains with different crystallographic orientations. Isotropic etchants, sometimes in combination with other techniques, are used in this case. Typically, acid solutions (HCl and HF) are usually used for texturisation, as they texture the wafer independently of the orientation of the grains.⁵⁰  A constant etch rate is maintained to avoid under-etching or over-etching and scrapped wafers. If the etching is too deep, the surface roughness increases thus decreasing the open circuit voltage and short circuit current of the cell. At the same time, shallow etching depth also lowers the open circuit voltage and short circuit current of the cell, due to surface recombination, as it barely removes the crystal defects on the surface.²⁸  The best solar cell efficiency has been found for an etching depth between 4 and 5 µm.^18–20,28 

Physical methods involve etching by dry processes such as mechanical grooving, reactive ion etching and laser ablation. Texturing by mechanical grooving is suitable for both mono-crystalline and Mc-Si silicon wafers.^54–58  The advantages of this technique are low cost and high texturisation rate. In this technique, surface texturisation is achieved by printing a structural wheel with a metal tool blade having a V-grooved surface, which is coated with abrasive diamond particles, and the cooling agent is water.⁵⁰  The spin speed is about 150–160 mm s⁻¹ depending on the grain size of the diamond particles. The wafers then undergo cleaning and post-treatments with chemicals to obtain well-shaped, defect-free grooves. Reactive ion etching (RIE) is a dry etching process where the wafer surface is etched by highly reactive ion plasma with tetrafluoromethane or a combination of sulfur hexafluoride and oxygen or chlorine as a reactant gas. RIE is capable of producing highly uniform, defined features (less than 1 µm) and is suitable for both mono-crystalline and Mc-Si silicon wafers.⁵⁰  Unlike wet etching, it can be controlled easily and does not depend on crystallographic orientation. Both masked and maskless RIE texturing results in a relatively increased absorption of light compared with other methods.

Laser ablation is a texturisation technique where the wafer surface is melted and evaporated under pulsed laser-generated radiation.⁵⁰  Advantages of this technique are the possibility of obtaining features with defined patterns and accuracy. The limitation of this technique is the formation of melted silicon at the bottom or sidewalls of the groove, and amorphous silicon debris, due to the laser-generated heat, leading to the deposition of foreign materials during texturisation.^44,45  Hence, the wafers are chemically etched to remove any residue that could increase the surface recombination.^46,50 

Doping of semiconductors can be performed during crystal growth, as mentioned in Section 1.1.2. Here, the crystal, and the wafer sliced from it, are uniformly doped with the dopants as the dopants are introduced along with the precursors. In contrast to doping during crystal growth, in the modern semiconductor industry doping is carried out on the substrate (after crystal growth and cutting), to control doping in specified regions by masking the undesired regions. In amorphous silicon devices, doping is still carried out during deposition. There are three techniques to form a p–n junction on a silicon substrate: diffusion, ion implantation and doping using alloy. Doping using alloy is rarely used in today's technology due to anomalies in the electrical properties. In this section, we will discuss the first two techniques.

Photolithography is used for patterning and defining the geometry for doping, as shown in Figure 1.12(c)–(g).⁵⁹  Prior to photolithography, an oxide layer of silicon is formed by thermal oxidation. Thermal oxidation of silicon occurs at a high temperature of about 800–1200 °C. The oxide layer can be grown in oxygen (dry oxidation) or in water vapour (wet oxidation) as shown in eqn (1.20) and (1.21), respectively.

In dry oxidation, oxygen diffuses through the oxide layer that is being formed and the growth rate decreases with increasing thickness. In wet oxidation, the growth rate is higher than that of dry oxidation since the hydroxide can diffuse more readily than oxygen through the oxide layer that is being formed. Hence, dry oxidation is used to form thin oxides of thickness less than 100 nm in a device structure and wet oxidation is used for thicker oxides, especially for masking, insulation or as passivation layers.

The wafer is coated with ultraviolet (UV) light-sensitive photoresist and baked for drying. The wafer is then exposed to a UV light source through a patterned mask with high sub-micrometre precision. After successful development, the resist is stripped away using chemicals. Doping is then carried out by diffusion or implantation and the p–n junction is formed as shown in Figure 1.12(g).⁵⁹  After the formation of the p–n junction, metal contacts are patterned on the wafers by a suitable metallisation process.

Doping by diffusion is a gradual mixing of atoms by random motion from a region of higher concentration to one of lower concentration. Over the years diffusion has been the most widely used technique for doping. In the diffusion method the surface of the silicon substrate, not protected by oxide layer, is exposed to a high concentration of dopant. The dopant moves into the substrate by solid-state diffusion.

Fick's law governs diffusion. Fick's first law states that the flux density, γ per unit area per unit time, is proportional to the concentration gradient:

where, N is the dopant concentration per unit volume and D is the diffusion coefficient specific to each element and depends strongly on the temperature, T:

where, D_o is the diffusion coefficient extrapolated to infinite temperature in cm² s⁻¹ and E_a is the activation energy in eV.

From the law of conservation of matter, the change of dopant concentration with time must be the same as the local decrease of the diffusion flux, in the absence of a source or a sink;

From Fick's first law,

When the concentration of the dopant is low, the diffusivity at a given temperature can be considered as constant, then Fick's second law is given as:

The doped regions can be created by any of the following two diffusion techniques. The constant source diffusion or pre-deposition process (dopant source is inexhaustible) which is the controlled doping of the desired dopants by solid, liquid or gas phase diffusion. The limited source diffusion or drive-in process (dopant source is exhaustible) which drives the dopants deeper into the substrate without further introduction of dopants.

When the dopant source is inexhaustible, the concentration of the dopant on the surface is kept constant. When the substrate is heated, the dopants diffuse into it to achieve equilibrium with the concentration near the surface. In other words, the surface concentration N_s remains constant and the dopants move deeper into the substrate, as the diffusion time, the diffusion temperature or both increase.⁶⁰  The concentration within the substrate is dependent on the diffusion time and diffusion temperature and results in complementary error function distribution.⁶⁰  The solution of Fick's second law that satisfies the initial and boundary conditions is given by

A Gaussian distribution results from limited source diffusion, i.e., when there is an exhaustible dopant source on the surface, with a concentration Q cm⁻². As the diffusion increases with time, the dopants move deeper into the substrate and the surface concentration decreases.⁶⁰  The solution of Fick's second law that satisfies the initial and boundary conditions is given by

For x = 0,

Eqn (1.28) becomes,

Boron (p-type dopant) is usually introduced during silicon processing and phosphorus is diffused to form an n-type junction. In a gas diffusion process for doping, phosphorus is introduced in the diffusion tube in the form of phosphine or phosphorus oxychloride gas at a high temperature of about 800 °C. Phosphorus can also be diffused using liquid phosphorus oxychloride in a heated furnace in the presence of nitrogen as a carrier gas. When oxygen is added in the diffusion tube, SiO₂ is produced at the surface of the silicon wafer. The dopant source, PH₃ or POCl₃, is converted to P₂O₅ and the released chlorine removes the metal impurities. This P₂O₅ reacts with SiO₂ to form a viscous liquid or a layer of phosphorus silicate glass (PSG) on the surface of the substrate.

At the diffusion temperature, phosphorus diffuses into the wafer. A solid dopant source, triphosphorus pentaoxide, can be used in place of POCl₃. An alternative technique used to diffuse phosphorus is by depositing diluted phosphoric acid onto the wafer surface and moving it horizontally on a conveyer belt in a firing furnace.⁶¹ 

Recently, the ion implantation technique has gained ground in the solar industry, slowly replacing the diffusion technique that has been used for many years.^62,63  As shown in Figure 1.13, the cell efficiencies are predicted to improve with continuous development of technologies towards achieving higher efficiencies. Apart from localised and patterned doping, the main advantages of this technique include high, precise control on the amount and distribution of the dopant doses, resulting in high uniformity, reproducibility and enhanced efficiency (beyond 19%), with a much narrower cell efficiency distribution.

In the ion implantation method, the selected ions of a desired impurity are introduced into the semiconductor by accelerating the impurity ions to a high energy level and implanting the ions into the semiconductor. The energy imparted to the impurity ions determines the ion implantation depth. Unlike the diffusion technique (wherein the dose of impurity ions is introduced only at the surface), in the ion implantation technique a controlled dose of impurity ions can be introduced deep inside the semiconductor. Photolithography is used for selective implantation of impurity ions, resulting in a highly reproducible and controlled doping concentration in the wafer.^64,65  For today's standard screen-printed p-type cells, ion implantation yields improved efficiencies through precision phosphorus profiles and high uniformity.⁶²  This technique yields higher efficiencies and lowers the cost not only by improving the technology and reducing the wafer sizes, but also by cutting the processing steps. Process simplification can be accomplished by eliminating the need for PSG and edge isolation by the use of single-sided ion implantation.

During phosphorus emitter diffusion from the gas phase onto the p-type substrates, the phosphorus-doped layer covers the entire surface of the cell, including the edges and the rear surface. This edge-shunt results in a reduction of the solar cell open circuit voltage and accounts for 80% of the total loss mechanism.⁶⁶  Edge isolation is performed to prevent shunting pathways between the front and the rear contacts. For screen-printed silicon solar cells, this is usually achieved by stacking the wafers on top of each other and plasma etching using the precursor gases carbon tetrafluoride and O₂. Other techniques include inserting a laser-based trench on the edges, sawing isolation trenches on the edges and grinding the wafer edge with sandpaper.^67,68  A laser edge isolation process is very commonly used in c-Si solar cell production.⁶⁹  This is done by scribing a groove at the edge of the wafer, with the groove depth extending a certain distance beyond the emitter diffusion layer, as shown in Figure 1.14.

The general groove dimensions have a width of about 30 µm and a depth of about 15 µm (Figure 1.15).⁶⁹  An alternative technique used is an inline system for single-sided etching to remove the emitter from one side of the wafer with acid solution.^{28,68,70–72}  The advantage of this technique is the higher throughput and hence a higher fill factor.^72–74 

When light falls on a bare silicon surface, over 30% of the incident light is reflected from the surface of the silicon because of the difference in the refractive indices of silicon and air, as shown in Figure 1.16.^75b–77  An anti-reflecting coating (ARC) is a dielectric thin-film coating applied to the surfaces of optical devices and is widely used in industrial solar cells to reduce the optical reflectivity of the surface in a certain wavelength range.^78,79 

The basic working principle behind ARC is that the reflected waves from different optical interfaces cancel each other by destructive interference. The reflection is large at the interface when there is a large mismatch between the refractive indices of the two neighbouring materials. On a bare silicon surface without an ARC, as shown in Figure 1.17, the reflected wave from the surface of the solar cell can be cancelled out by another wave, if that other wave can be made to be of equal wavelength, magnitude and direction, but of opposite phase (destructive interference). For this to happen, we need to create another reflected wave at a different location from the surface of the silicon, such that the two reflected waves are a half-wavelength out of phase. The two reflections are exactly a half-wavelength apart, when the two reflective surfaces are a quarter-wavelength apart. Hence, anti-reflective coatings are also known as “quarter-wave” coatings. With the appropriate choice of dielectric material and its layer thickness, minimum reflection from the surface of the silicon can be achieved at a certain wavelength.

For an effective ARC, the optical thickness, d, which causes minimum reflection, is given by:

where, λ_o is the wavelength of the photon at the peak of the solar spectrum and n₁ is the refractive index of the coating material.

Reflection is further minimised if the refractive index of the coating material, n₁, is the geometric mean of the refractive indices of the materials on either side:

where, n₀ and n₂ are the refractive indices of air and silicon, respectively.

In a single-layer coating, minimum reflectance is obtained at a single wavelength or, in other words, reduction of reflection is possible only for a small range of wavelengths. Hence, if a reduction in reflections is required over a large range of the spectrum, several layers of ARCs of different refractive indices and thickness must be applied. The refractive index of the upper ARC layer must be lower than that of the ARC layer on the silicon substrate, as shown in Figure 1.18. Here, n₀, n₁, n₂ and n₃ are the refractive index of air, two ARC thin films and the solar cell, respectively. With a multiple layer coating, light transmission of up to just under 99% can be obtained, resulting in an increase in efficiency of the cell and, hence, reducing the total cost of the module.

Silicon nitride is typically used as the standard ARC to create quarter-wave interference for industrial silicon solar cells. This is preferred to the traditionally used ARCs of titanium dioxide and silicon dioxide thin films. TiO₂ as an ARC lacks both surface and bulk passivation properties.^80,81  Moreover, tuning of the refractive index over a wide range is not possible, making TiO₂ thin films unsuitable for multi-layered ARCs. Although, thermally grown SiO₂ thin films have good surface passivation properties, it is not very effective for bulk passivation and its low refractive index hinders its optimal optical performance as an ARC for silicon solar cells.^82–87 

ARC thin films of silicon nitride are deposited either by chemical vapour deposition (CVD) or by sputtering. In CVD, the reaction is initiated by low pressure chemical vapour deposition, plasma-enhanced chemical vapour deposition (PECVD) or by atmospheric pressure chemical vapour deposition (APCVD), to deposit a thin film of silicon nitride coating from the precursor gases.^88,89  Here, the precursor gases are silane and ammonia and the reaction takes place as shown in eqn (1.35). Most of the hydrogen during the reaction evaporates, while some of it diffuses from the interface into the bulk of the cell. The free hydrogen that diffuses into the bulk is highly reactive and attaches itself to the defects in the bulk, passivating the defects and improving the bulk carrier lifetime.^90–93  Hence, the deposition of thin films of silicon nitride can not only reduce the optical losses due to reflection, but also simultaneously provide surface and bulk passivation.^88–94 

The silicon nitride thin films deposited by the PECVD process can act as both a surface and bulk passivating ARC layer for crystalline silicon solar cells for two reasons. First, tuning of the refractive index is possible for the deposition of silicon nitride thin films by controlling the gas flow ratio of the precursor gases. Hence, single- or double-layered ARC for minimum reflectance can be achieved with silicon nitride thin films.⁹⁵  Second, silicon nitride thin films deposited by PECVD have larger amounts of hydrogen (about 15 to 20 atomic%) leading to a much higher passivation effect, making it also highly suitable for bulk passivation of defect-rich Mc-Si.^92–97  The APCVD method is mostly used in microelectronics. Sputtered thin films of silicon nitride have been reported to have similar surface and bulk passivation properties as films deposited by PECVD.^98,99 

Contacts are formed on the surface of the silicon solar cells for extracting charge carriers from the device and to prevent back-diffusion of the carriers into the cell. Screen printing is generally used to form front and rear contacts in commercial solar cells due to robustness and simplicity. Different printing parameters, such as paste composition, viscosity of the paste, emulsion thickness, mesh dimensions, tension of the screen, paste temperature, printing speed, snap-off distance, squeegee speed and pressure, have a high impact on the quality of the print.^100–106  The screen-printed contacts should have low contact resistance, good adhesion to silicon, high aspect ratio and no junction shunting.²⁸ 

Almost all commercial screen printing lines have a net throughput of around 1000 and 2000 wafers h⁻¹ for single and double lines, respectively, and solar cells up to 210 × 210 mm² in size can be processed on these lines.²⁸  The cells move on a conveyer belt and the silver-based paste passes through a patterned screen, leaving a uniformly spaced metal pattern on the surface. After printing the front contact, the cells are dried in the belt furnace, to avoid smudging and to remove all the organic binder that was in the paste. The cells are then loaded back to the conveyer belt for printing the rear or back contact. For the backside metallisation, aluminium is usually chosen for good ohmic contact (a low resistance junction to provide good conduction between the metal and the semiconductor). After printing, the front and the rear contact are fired simultaneously (co-firing) in a firing furnace. In addition, contacts are heavily influenced by the metal–semiconductor interface, since over firing (metal drives deep into the bulk silicon, introducing a shunting pathway in the device) or under firing (poor contacts) the contacts may result in an increase in the shunt resistance and series resistance, respectively. In a buried contact cell, on the front side, the metallisation is performed just above the low resistance or highly doped emitter (n⁺⁺), as shown in Figure 1.19, to prevent shunting and to reduce the contact resistance between the semiconductor and metal.^12,107  A shallow emitter, created above the p-type semiconductor improves the blue response and minimises the Auger recombination. The silver-based paste, which is used for the front contact, consists of metal oxides to facilitate silver etching through the ARC thin film. This improves the adhesion of silver to the front surface of silicon and ensures a good electrical contact. On the back surface, during the firing process, a certain amount of aluminium will diffuse into the p region to create a p⁺ region near the back surface or an aluminium back surface field. This field pushes the electrons from the back surface to the front surface preventing any back surface recombination of minority carriers. A model for the formation of the screen-printed rear contact is given by Neuhaus et al.^28,108  Since, it is difficult to solder onto the screen-printed aluminium contact, silver strips that can be easily soldered to the interconnects are printed on the cell.

The finer lines of metallisation connected to busbars are called fingers. The fingers collect the current generated by the solar cell and deliver it to the busbars. The critical features of the top contact design that determine the magnitude of the losses here are: the finger and busbar spacing, the metal height-to-width aspect ratio, the minimum metal line width and the resistivity of the metal. Hence, the size and grid separation of the top metal contacts have a key role in determining the performance of a solar cell. Minimising the top contact coverage of the cell surface can reduce optical losses due to reflection, but this may result in increased series resistance. A balance between the optical and electrical losses is a trade-off for the design of the top contact. Hence, the design of the top contact involves reducing the resistive losses in the emitter, the resistive losses in the metal top contact and the shadowing losses. An alternative approach to reduce both the surface recombination and the resistive and shadowing losses is to develop a back contact solar cell that is completely contact-free on the top surface of the cell.²⁸ 

Testing and sorting the solar cell devices according to their performance and appearance are the final steps in solar cell manufacture. This involves determining the solar cell parameters of an individual cell (which will eventually be connected in series to other cells to develop a module), determining its reverse breakthrough characteristics (to avoid hot-spot heating within the module) and sorting the cells (to minimise any possible mismatch losses in a module).^109–111  The modules are exposed to 1 Sun radiation under AM1.5 and the current–voltage characteristics measured at 25 °C. Most current–voltage testers consist of a halogen flash lamp that can stay constant for more than 50 ms (1000 W m⁻², reproducibility ± 1.5%, spectra class A and uniformity of ± 2% IEC60904-9, satisfying the standard solar simulator performance requirement International Electrotechnical Commission (IEC) standard).¹⁰⁷  Individual wafer flatness and surface particles undergo inspection to assure wafer quality before packaging.

Solar power is a source of clean energy with great potential, but at present it provides only a minor portion of our global energy requirements. According to the World Energy Council report, the global primary energy consumption is about 12 billion tonnes of coal equivalent per year. This is forecast to grow to 16 billion tonnes of coal equivalent by 2020 based on the social, political and economic developments worldwide.¹¹²  In 2016, renewable energy provided an estimated 19.3% of global final energy consumption, in which the contribution from solar PV technology was only 1.5%.¹¹³  Figure 1.20 shows a 2 MWp PV power plant installed in India to feed a centralised grid. The power plant is installed using a multi-crystalline silicon PV module with time-based single-axis tracking.

In general, PV systems are classified based on the loads designed to operate their connections with utility systems and the sources, as shown in Figure 1.21.

An off-grid system is not connected to the electrical grid. The main components of an off-grid system are an inverter, battery, PV module and charge controller as shown in Figure 1.22. In residential systems, the power plant should be correctly sized so that it can generate enough power with enough battery capacity to meet all the requirements of the user. The cost of the battery and the inverter for an off-grid system is high and is more expensive than for an on-grid system of the same size. At present, the lifetime of the battery is lower than the PV module. However, the cost of batteries is reducing rapidly and the lifetime is increasing. Appliances use the solar power produced by the PV modules and then the excess power charges the battery. The charging or discharging is usually controlled by the charge controller. During the night, or when solar irradiance is low, appliances can draw power from the battery. In off-grid systems, an electric generator can be used as a back-up. The size of the generator should be adequate to supply electricity and charge the battery at the same time.

On-grid systems are not coupled to a storage system (a battery) and are directly connected to the electrical grid. The electricity generated from solar power is sold directly to the grid. The main components are an inverter, PV module, meter and electricity grid, as shown in Figure 1.23. There are two types of meter used: net meter and gross meter. Net metering schemes allow consumers to use the excess electricity that is not used in the premises when it is generated, at a later time. Net meters record the amount of energy exported by the PV system to the grid and the amount energy drawn from the grid. In gross metering schemes, consumers export all the electricity produced by their PV system to the grid in return for a generous feed-in-tariff (FIT), which is normally higher than the cost of the electricity that they buy back from their electricity retailer. FITs are therefore used as a policy incentive to invest in renewable energy and, as the costs associated with PVs have decreased so the FITs offered have decreased. The on-grid inverter should have an anti-islanding function, which senses the occurrence of a grid power outage and shuts the inverter automatically.

A hybrid system is connected to both the electrical grid and a battery. The system can store energy for use by the consumer and it can also export all or some of the generated electricity to the grid. The main components are an inverter, battery, PV module, meter and electricity grid, as shown in Figure 1.24.

All these types of system can be installed to produce electricity from solar power. However, for decentralised applications of solar energy, storage is very much a requirement. Details of the energy storage used in solar PVs are discussed in the next section.

Storage of energy in different forms has existed for centuries. Energy storage plays an important role in making the best use of electricity from sunlight. Energy can be stored when demand is low and generation is high thus ensuring its availability when demand is high. There are different types of energy storage used for solar PVs, including batteries, pumped water, hydrogen, heat storage, compressed air and flywheels. Typical types of batteries used in solar PV systems include lead acid, lithium ion, nickel cadmium and nickel iron. The characteristics needed for battery or storage systems to be used with solar PVs are: low cost, high efficiency, low maintenance, long lifetime, high reliability, wide range of operating temperatures and low self-discharge. Hydroelectric storage can also be used for solar PVs, in which water is pumped to a reservoir at high elevation and electricity regenerated when required by releasing the water through turbines. Coupling electricity storage with solar PVs is critical for the technology to be a viable alternative to fossil fuels. However, the cost of storage can be, relatively, very high.

For smooth generation, transmission and consumption of solar electricity, the smart grid concept is generally used. A smart grid can be defined based on its capabilities and operational characteristics. It allows the operator seated in a control room to operate the grid more effectively with distributed intelligence, sophisticated information and communication technologies. The balance between supply, consumption and demand is maintained to improve reliability and availability. Smart grids should have the characteristics shown in Figure 1.25.

The smart grid should be automatically responsive to changing conditions in the grid in order to improve reliability. The system should have the ability to detect faults before their occurrence in the power plant, so that speedy recovery of the system can be achieved. To keep the grid stable, there should be integration between real-time communications from the field to the control room and control function. Instant feedback is possible via interaction in the system between the customer and the controller. Thus, one of the main characteristics of smart grids is optimisation of the generation, transmission, distribution and consumption of solar electricity. Table 1.1 shows the difference between a smart power grid and a general power grid.

The energy from solar PVs is a distributed form of energy. Different countries have taken policy initiatives that encourage the transition towards “green” energy. Table 1.2 shows the status of solar PVs for some countries. Most of these are emerging markets for solar PVs. Details for some of the biggest global markets for solar photovoltaics are as follows.

India: India is an energy negative country. According to the Central Electricity Authority (CEA), the total electricity generation (utilities and non-utilities) in the country is 1,433.4 TWh.¹¹⁶  Under the National Solar Mission, the target for Grid Connected Solar Power Projects is 100 000 MW by the year 2021–22. The target is distributed as 60 GW of large- and medium-scale grid connected and 40 GW of solar roof-top projects. According to a study by the National Institute of Solar Energy, India, the total potential of the country is 768 GW. As of 31 December 2018, solar installed capacity in India is more than 26 GW. India's roof-top solar market has expanded significantly in recent years. The Ministry of New and Renewable Energy, Government of India, has given individual targets to each state to set power plants. Tamil Nadu, Andhra Pradesh and Telangana have emerged as the fastest growing states in terms of installation of PVs.¹¹⁷  One of the major problems in India's solar sector is congestion in the grid and curtailment. To resolve this problem, India is trying to develop a green energy corridor to carry power from solar-rich areas to the centralised grid. The Government of India launched a scheme named Ujwal DISCOM Assurance Yojana for financial and operational reform of the distribution company (DISCOM). Under this scheme, state governments will take over 75% of their debt and pay back lenders by selling bonds. The Government of India has sanctioned financial support of $1.2 billion for the development of a 40 000 MW solar park by the year 2020. Emerging markets continue to drive growth and the Indian PV market is growing rapidly.¹¹⁵  According to a report by Bridge to India, a consulting and knowledge service provider in the Indian renewable market, the module price has declined by 29% year on year from 2015 to 2017.¹¹⁵  Currently, the price of a module is $0.33 per Wp, and it continues to decline. However, it is essential to check the reliability of PV modules with decreasing cost. The price of inverters has also declined by 21% from 2015 to 2017. Currently, the typical price of an inverter is around $0.029 per Wp in the Indian market. The typical cost of the battery per ampere hour (Ah) rises from $0.17 to $0.23 based on the size of the Ah. Indian domestic modules tend to be 10–20% more expensive than Chinese modules. According to a MERCOM report, in 2017–18 solar imports grew by 36% and exports declined by 60%, compared with 2016–17. India has also imposed an anti-dumping duty on tempered solar glass.¹¹⁸ 

Roof-top solar power plants are installed in India under capital expenditure route accounts and the operating expenditure model. It has been projected that 11.9 GW of new roof-top solar capacity will be added by 2021.¹¹⁵  Currently, India has adopted a net metering system. Under this scheme residential, institutional and government consumers can install power plants under a subsidy scheme and sell the electricity to the state electricity board. The Ministry of New and Renewable Energy has sanctioned up to a 90% subsidy for solar roof-top power plants. Figure 1.26 shows a ground-mounted PV system of 1 kWp size. It is an off-grid system with a battery to meet the energy requirement of a rural household in India.

An IRENA report on storage estimates that India has a stationary power storage capacity equal to 7 GW. Of this installed capacity 110 MW is in the form of electrochemical batteries.¹¹⁹  The solar water pump is a major technology in India, which is used for drinking water and irrigation purposes. Solar-based lanterns are a common decentralised application of solar PVs. In India more than 30% of people do not have access to a supply of electricity. To address this, the Government of India launched the Million Soul Urja Lamp Program. This is an effort to take solar lamps to rural India to address the primary energy needs of the residents, through installation and skill development of local people.

In India, solar PV power plants are monitored using the supervisory control and data acquisition (SCADA) system.¹²⁰  Smart grids are a new concept for controlling a centralised grid, which have yet to be widely adopted. For supply and demand management of electricity, the smart grid concept is currently only applied on a small scale and further development is required before smart grids can be used to control the centralised grid. For example, so far there no defined standards and guidelines exist for the regulation of smart grid initiatives in India, although work to standardise continues.¹¹⁷  The current policy and regulatory frameworks are typically designed to deal with the existing networks and utilities. India is developing a green corridor to distribute electricity from regions with high solar potential and, here, the smart grid concept will be a working agent.

China: China is the biggest PV market, globally. The Global Status Report 2017 estimates the total solar PV capacity to be 77.4 GW, far more than any other country.¹¹³  In July 2017, China announced a target of 240 GW of solar installations all over the country by 2020. The guide published by the National Energy Administration predicted an installation of 86.5 GW, consisting of 54.5 GW of ground-mounted systems and 32 GW of “top runner programme” installations, and 45 GW of PV capacities foreseen under the Poverty Alleviation Programme of the 13th Five Year Plan during 2017 to 2020.¹²¹  As per the data of 2016 in China, Xinjiang province (3.3 GW) was the top market in China, followed by Shandong (3.2 GW) and Henan (2.4 GW) provinces. However, the rapid increase in solar PV capacity has created grid congestion problems. To address these problems, China has set minimum guaranteed utilisation hours (purchase requirements) for solar and other renewable power plants and has built high-voltage transmission lines. The average cost of a PV module is $0.28–0.40 per watt.¹²²  According to IRENA, the installation cost of a PV system in China declined by up to 71% from 2010 to 2017. Although the PV industry of China is booming, it faces three pressing issues: solar curtailment, subsidy arrears and difficulties in financing. The Chinese government is addressing these through policy to incentivise greener energy.

At present, China is the largest market for smart grid technology. The two main reasons are: first, China is committed to green development and, second, its rapid growth in the smart grid sector. In China, automated measuring systems are widely used and the industry has acquired practical knowledge in real-time monitoring; for example, through SCADA, remote monitoring and load management. There are examples of different pilot projects in China that have successfully applied smart grids; however, four major barriers to the widespread adoption of smart grids have been identified by Yanshan et al.¹²³  These barriers are as follows.

1. Unified goals and emphasis on smart grid development have not been established.

2. Old systems need to be upgraded to satisfy the demand for information, automation and interoperability in the smart grid.

3. Power operating mechanisms need to improve.

4. Standards and business models of smart grids have to be improved or established in some areas.

USA: The USA is one of the top markets for PVs in the world. In 2017, the total installed capacity was more than 47 GW, which supplies more than 1% of electricity demand in the USA. The Department of Energy (DoE), USA, launched the SunShot Initiative in 2011 to achieve a cost target of $0.06 per kWh for utility-scale PV solar power by 2020.¹²⁴  Subsequently, in 2016, the DoE announced further targets for the cost of electricity of $0.03 per kWh from utility-scale PV, $0.05 per kWh from the residential sector and $0.04 per kWh from the commercial sector, by 2030. In 2016 NREL reported the benchmark cost of a string inverter at $2.78 per W, the DC power optimiser cost at $2.94 per W and the cost of a micro inverter at $3.28 per W. The average cost of a battery is $471 per kWh.¹²⁴ 

The top ten states with the highest percentage of market share in the USA are: California, Utah, Georgia, Nevada, North Carolina, Texas, Arizona, Massachusetts, Florida and Colorado. Many states apply federal programmes and policies to attract customers for PVs. The PV utility projects are mainly based on power purchase agreements. Financial incentives, such as tax credits and direct legislative mandates are used to encourage the development of markets.^124,125  To achieve the target set by Sunshot, the following approach has been applied: improvements in module price and efficiency, non-module hardware and soft costs, system reliability, and operations and maintenance costs. The DoE has invested in strategic partnerships to accelerate investments in grid modernisation. They are supporting research on synchrophasors, advanced grid modelling and energy storage. In 2016, the DoE launched the Grid Modernisation Initiative (GMI), a comprehensive effort to help shape the future of the grid with primary funding support coming from the Office of Electricity Delivery and Energy Reliability and the Office of Energy Efficiency and Renewable Energy. The DoE has invested $4.5 billion to help modernise the nation's energy infrastructure.^124,125  The technologies and targets are as follows.

1. Integration of centralised and distributed renewable resources and other new technologies.

2. Meeting customer demands for power with high reliability.

3. Participation of customers in electricity markets and to manage their consumption.

4. Infrastructure required to provide for convergence of information and communication technologies with electricity control systems.

5. Provide new and better grid capabilities and reduce costs.

Japan: The PV market in Japan was the third largest in 2016. By 2030, solar power is expected to meet 7% of the country's electricity requirements. The Japanese government set a target of 28 GW for PVs by 2020 and 53 GW by 2030. However, the Japanese Photovoltaic Energy Association has targeted 200 GW of installed PVs by 2050. The total installed capacity of PVs in Japan was estimated to be 50 GW in 2017.^112,113  To expand solar PVs in the country, the Japanese government uses subsidies and feed-in-tariff policies. In 2017 the government launched a tender scheme for solar PVs. They have awarded 140 MW to different companies to install solar PV plants. The lowest bid is $0.16 per kWh; however, the FIT rate is $0.19 per kWh. The cost of modules manufactured by Japanese companies is around $1.34 per W. The total installation cost for Japan is $3.2 per watt for 10–50 kWp systems, $2.86 per watt for 50–500 kWp systems, $2.60 per watt for 500–2000 kWp systems (Wp = peak watt).¹¹³ 

Issues related to the solar PV sector in Japan include:

1. The high cost of modules produced by Japanese manufacturers, due to the low production scale and the high labour costs.

2. Construction and other expenses are high; demand is not sufficient in the country to make it more cost effective.

The large volume of solar PV projects and their output has begun challenging Japan's fragmented electric power grid, which requires control though a centralised grid. To solve this problem, the government has revised regulations, which has lead some utilities to refuse new interconnections and to curtail output from existing plants without compensation.¹²⁸  Globally, Japan is one of the top markets for smart grids. The Japanese government has introduced supportive policies for the development of energy efficiency, smart grid and micro grid sectors, and the renewable energy sector is rapidly growing. There are some opportunities in terms of smart grids.

1. Integration of distributed sources of energy into Japan's grid and distribution management.

2. Consumer engagement for meeting energy efficiency.

3. Grid reliability in outage systems and micro grids.

Germany: Germany is the second top PV installer after China. The total installed PV capacity was 43.41 GW in 2018. Germany plans to meet most or all of its energy demand with renewables by 2050. To achieve this, an average of 4–5 GW of PV power plants must be installed every year, reaching a total capacity of 150–200 GW by 2050. To promote electricity generation from distributed sources of energy, the German government passed a series of laws known as the Renewable Energy Sources Act and launched the first feed-in-tariff (FIT) programme in the world. The PV electricity produced in MW power plants starts at $0.046–0.057 per kWh and the module cost is $0.057 per W. Depending on the system size, the feed-in-tariff for small roof systems put into operation by April 2018 can be up to $0.14 per kWh. For medium-size systems, from 750 kW up to 10 MW, the feed-in-tariff is $0.046 per kWh.¹²⁶ 

Germany wants to develop their grid infrastructure to make it smarter. It has been forecast that Germany's investment on smart grid infrastructure will grow to $23.6 billion between 2016 and 2026.¹²⁶  The German government has combined smart grid activities under the auspices of the national government initiative “E-energy – IT-based energy systems of the future”. They have launched a funding programme “Smart Energy Showcases - Digital Agenda for the Energy Transition” (SINTEG) for developing and demonstrating new approaches to safeguarding secure grid operation in model regions with high shares of intermittent power generation on the basis of renewable energy.

Thin-film photovoltaics make up approximately 10% of the global PV market. The thickness of these devices ranges from a few nanometres to tens of micrometres, which is about 10 to 100 times thinner than silicon solar cells. The three most widely commercialised thin-film solar cells are based on amorphous silicon (a-Si), CdTe or CIGS. CdTe and CIGS are described in more detail in Chapter 2.

Amorphous silicon (a-Si), CdTe and CIGS behave as direct band gap semiconductors with very high optical absorption coefficients (α).

Where, A is a constant, h is Planck's constant, v is the frequency of absorbed light at the onset of absorption (hv is the energy of the photon at frequency v) and E_g is the band gap.

where, m$e*$ and m$h*$ are the effective masses of the electron and hole, respectively, m_r is the reduced mass, q is the elementary charge, n is the refractive index, ε₀ is the vacuum permittivity and x_vc is a matrix element.

Silicon behaves as an indirect band gap semiconductor, where the absorption coefficient is related to the band gap as follows:

Moreover, silicon has a very high refractive index (>3.4) near the band gap edge and absorbs light inefficiently.

Direct transitions have a high probability (large value of α) because the momentum of the electron in the conduction band is the same as the hole in the valence band. Indirect transitions are less probable (low value of α) because the momentum of the electron in the conduction band is not the same as the hole in the valence band and the absorption of a phonon as well as a photon is required. The absorption coefficient of an absorber layer is inversely proportional to its thickness and, since silicon has a very low absorption coefficient, it requires cells thicker than 10 mm.¹²⁹  For this reason, the same thickness of a-Si can absorb much more light than its crystalline counterpart.

There are several advantages of thin-film solar cells over the thicker solar cells. The amount of semiconductor material used for thin-film fabrication and the power consumed during this process is low, making it more feasible for fabrication of large-area devices at a faster processing rate and better cost efficiency (low material consumption, processing, handling and capital costs). Although SiO₂ is abundant, the production of silicon wafers is an energy intensive and laborious process. A large amount of energy is consumed in manufacturing silicon solar cells, so it takes a long time to get the energy back from the silicon panel that was put in to making it. For instance, crystalline silicon PV systems have an energy payback time of ca. 1.5–2 years for south European locations and of ca. 2.7–3.5 years for middle European locations.¹²⁸  In contrast, thin-film solar cells are usually grown using vacuum-based deposition techniques, including CVD, and physical vapour deposition techniques such as thermal evaporation, e-beam evaporation, sputtering, vapour transfer deposition, closed space sublimation, pulsed laser deposition, atomic layer deposition and molecular beam epitaxy. Some of these techniques are very expensive but there is a trade-off between the quality of the thin film and the time taken to deposit it. Solution-based deposition techniques, such as spin coating, electro-deposition, screen printing, layer-by-layer deposition, spray pyrolysis and colloidal synthesis are also used to deposit thin films. However, thin films deposited by the vapour deposition technique are more viable, due to uniform surface coverage, high crystallinity and high purity and, hence, they tend to improve device reproducibility and stability.

The energy payback time for CIGS-based thin-film PV modules produced in China (1700 kW h m⁻² solar irradiation per year) is significantly lower than that of conventional silicon modules and is about 0.78 years.^130,131  Another major advantage is that the material for thin-film solar cells can be deposited on flexible substrates, resulting in the potential for roll-to-roll deposition. Some of these materials have better radiation hardness than silicon and resist degradation of device performance, making thin-film PVs applicable in space applications.

The choice of deposition technique depends on the specific material system. Thin-film compounds are typically binary, ternary, quaternary or multinary semiconductors, a few of which have received lots of attention for PV applications, but have not been economically successful for large-scale commercial production. The common issue with these types of materials, with increasing numbers of components, is the complexity of phase stability and achieving a perfect stoichiometry. For example, this is clearly observed in one of the most promising quaternary semiconductor materials, Cu₂ZnSnS₄, for which there is a very small chemical potential region in which the desired stoichiometric phase forms.^133,134 

The structural, electrical and optical properties of the thin films grown, strongly depends on various deposition conditions, such as growth temperature and other physical parameters. By monitoring and controlling the growth processes or deposition conditions, reproducible thin films, with similar characteristics can be developed. Both an improvement in stability and in band gap tuning is possible by materials engineering and optimising the processing techniques. For example, a-Si is usually grown by plasma-enhanced CVD at low temperatures (200–500 °C) and, depending on the deposition conditions, a range of a-Si materials is grown with different charge carrier mobilities between 0.001 and 0.1 cm² V⁻¹ s⁻¹. As deposited, a-Si has a band gap of 1.7 eV and this can be tuned between 1.3 eV and 2.0 eV by introducing GeH₄ or CH₄ during deposition. The film can be made n- or p-type by adding B₂H₆ or PH₃.

Another advantage of thin-film solar cells, including a-Si, over c-Si solar cells is their better temperature coefficients (the loss of power at higher operating temperatures). Figure 1.27 refers to the effects of temperature on the fill factor of CIGS, CdTe, thin-film Si, α-Si, and a-Si/micro-Si. With the exception of a-Si, all the other module technologies exhibit a linear behaviour with increasing temperature.^132,135 

The efficiency of CdTe and CIGS have exceeded 22% (see Figure 1.7), and most of the increase in cell efficiency comes from generating high current. Ideally, thinner devices with a proper light-management technique will tend to have a higher concentration of charge collected in the thin layer of the cell and, hence, have a higher charge carrier density. This results in a higher separation of the quasi-Fermi energies (a shift in Fermi energy levels towards the band edges, due to enhanced carrier densities under illumination) resulting in higher output voltage for the device. The present drive is to increase the output voltage of the cell to increase the device efficiency. Although the stability of industrial thin-film solar cells has improved over the years, their degradation with time due to the moisture present in the atmosphere still remains sensitive to factors such as the quality of encapsulation. Using toxic materials like cadmium in the primary steps remains less of a concern as cadmium is present in stable forms in the final device, such as CdS and CdTe, which are insoluble in water. The material constrained growth of installed capacity in the year 2020 is estimated at about 20 GWp per year for CdTe, 70 GWp per year for CIGS and 200 GWp per year for a-Si : Ge.¹³² 

The efficiency of a-Si thin-film solar cells has reached 14%, which is lower than c-Si because of lower carrier mobilities and internal losses due to the disordered structure. Furthermore, a-Si devices suffer from light-induced degradation. Overcoming the light-induced metastable defects (or Staebler–Wronski defects) in a-Si thin-film solar cells, and their effect on the degradation of material performance under sunlight with time, has been the focus of substantial research effort. These defects affect the device architecture by limiting the intrinsic layer thickness. The thinner the intrinsic layer, the lower the carrier recombination losses and, hence, the lower the loss in the device performance.^{132,135–137}  This may mean that not all of the incident light is collected, so multi-junction device architectures are being developed.

Over time, the cost of solar modules has decreased due to increasing efficiency, improving technology, economies of scale and oversupply of modules. However, the total cost of solar power is not the cost of modules alone, but also includes the balance of system (BOS) costs. BOS is all the upfront costs associated with a photovoltaic system, excluding the cost of the module. Since there is less potential for reducing the BOS, the key is to develop technologies that would further enhance the efficiency while keeping the cost of manufacturing low. In multi-junction devices, different layers are stacked preferentially to absorb light from different regions of the solar spectrum to exceed the SQ limit. By choosing materials with very similar lattice constants but having different energy gaps, defect-free interfaces could be achieved and interface recombination could be reduced.

The global development of thin-film technology in the current market is due to the expanding growth in construction, utility and building integrated PV markets and applications that demand more flexible, lighter weight solar modules that are easy to install and have low manufacturing costs. Of the three candidates, CdTe possesses the largest market share (representing ∼5% of the total world market), followed by CIGS and a-Si. Progress in research and development, such as introducing more robust materials and cell architectures to improve reliability and by creating new materials to decrease the dependence on rare elements, may allow further market growth of thin-film technologies.¹³²  Key developments in these areas will be explored in the following chapters.