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Conventional computer hardware based on digital (Boolean) logic and the von Neumann architecture, which separates computing and memory, results in large power and time costs in data-intensive applications like deep learning. Memristive-crossbar-based accelerators promise to improve power efficiency and speed by orders of magnitude but suffer from nonidealities, which cause errors. Here, we overview a number of algorithmic approaches that aim to improve the accuracy and robustness of networks implemented on memristive crossbar arrays. Algorithmic optimisation is attractive because it is relatively technology-agnostic and offers many possible options: from improvements of the training procedure to non-disruptive changes at the circuit level.

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